The present invention relates to a semiconductor device and a method for fabricating the same, and more particularly, it relates to a semiconductor device including an n-type MIS (metal insulator semiconductor) transistor and a p-type MIS transistor and a method for fabricating the same.
As means for improving the driving performance of a semiconductor device having a MIS structure, not only refinement of a gate length but also improvement of channel mobility by applying a stain technique in a channel region is now being regarded a promising method. As the strain technique to be employed in, for example, an n-type MIS transistor, a method in which a liner film is provided with tensile stress, SMT (stress memorization technique) and the like are being studied. In the SMT, activation annealing is performed with an insulating film, for applying stress to a channel region, deposited on a transistor, so as to utilize the thus obtained residual stress. On the other hand, as the strain technique to be employed in a p-type MIS transistor, a method in which a liner film is provided with compressive stress and a method in which an active region is provided with compressive stress by epitaxially growing a silicon germanium (SiGe) layer selectively on the active region are being studied (see, for example, W. H. Lee et al., “IEDM 2005”, pp. 61-64).
In the case where a strain layer of SiGe is formed for providing a p-type MIS transistor alone with compressive stress, the following process is employed:
First, as shown in FIG. 11A, a first gate insulating film 113A, a first gate electrode 114A and a first hard mask 133A of an n-type MIS transistor are formed on a first active region 101A surrounded with an isolation region 112 in a semiconductor substrate 100, and n-type extension diffusion layers 117A are formed in the first active region 101A. Also, a second gate insulating film 113B, a second gate electrode 114B and a second hard mask 133B of a p-type MIS transistor are formed on a second active region 101B surrounded with the isolation region 112, and p-type extension diffusion layers 117B are formed in the second active region 101B. Subsequently, a first sidewall 115A including an insulating film 118A and an insulating film 119A is formed on the side face of the first gate electrode 114A, and a second sidewall 115B including an insulating film 118B and an insulating film 119B is formed on the side face of the second gate electrode 114B.
Next, after depositing an insulating film 135 over the semiconductor substrate 100, a portion of the insulating film 135 deposited in the second region 100B is selectively removed. Thereafter, by using the remaining insulating film 135 as a mask, a recess 100a is formed in an exposed portion of the second active region 101B as shown in FIG. 11B.
Then, as shown in FIG. 11C, a SiGe layer 121 corresponding to a strain layer is epitaxially grown in the recess 100a. Subsequently, after removing the insulating film 135, n-type source/drain diffusion layers are formed, and a silicide layer, a liner film, an interlayer insulating film, a contact, an interconnection and the like are further formed if necessary.
Through this process, a semiconductor device in which compressive stress is applied merely to a p-type MIS transistor can be realized.
The conventional fabrication process for a semiconductor device has, however, the following problems: In order to form a SiGe layer merely in a p-type MIS transistor forming region, it is necessary to form a mask made of an insulating film covering an n-type MIS transistor forming region.
In forming or removing a mask made of an insulating film, it is necessary to perform excessive over-etching so as not to allow the insulating film to remain. Therefore, a sidewall film may be reduced in the thickness or a substrate may be partly removed in forming or removing such a mask. It is difficult to control such unintentional thickness reduction or substrate removal, and hence, the characteristics of semiconductor devices are disadvantageously varied due to the thickness reduction or substrate removal. Also when the insulating film unintentionally remains, it is apprehended that the characteristics may be varied. Furthermore, there arises another problem that the number of procedures is increased because of the formation and removal of the mask.